Dual Active Bridge Converter Soft Switching

Overview

This demo model shows how PLECS Spice can reveal the true soft switching waveforms that are not visible in standard PLECS simulation with ideal switch models. By comparing PLECS simulations to PLECS Spice simulations, it is possible to validate Zero Voltage Switching (ZVS) operation and observe how dead time affects the resonant discharge of MOSFET parasitic capacitances. Zero Voltage Switching is a complex problem requiring detailed modeling of power semiconductors and a proper control and modulation strategy. A tool like PLECS Spice is valuable for incorporating all possible design space parameters into an organic model.

Note

This model contains model initialization commands that are accessible from:

PLECS Standalone: the menu Simulation > Simulation Parameters… > Initializations

Model

The Dual Active Bridge (DAB) converter is chosen as an example topology due to its significance in high power DC-DC conversion applications and its capability of achieving soft switching. It is a bidirectional DC-DC converter topology consisting of two full-bridges coupled through a high-frequency transformer and energy transfer inductor (combining leakage and external inductance). This topology has become important for cutting-edge applications demanding high power density, bidirectional energy flow, and galvanic isolation, including electric vehicle fast chargers, grid-connected battery energy storage systems, and solid-state transformers for renewable energy integration. The main schematic of the model is reported in Fig. 1.

Fig. 1 Dual Active Bridge converter with controls schematic.

Power Stage

A Configurable Subsystem encapsulates the MOSFETs in the power stage, allowing seamless transition from ideal PLECS switch models to detailed SPICE-based device models. Additionally, the Model Reference component is used to create local instances of the individual subsystems representing primary and secondary side MOSFETs, as is noticeable from the small black arrows at the bottom left of the referenced subsystems in Fig. 1.

Fig. 2 PLECS configuration of MOSFET subsystem.

The PLECS configuration of the MOSFET subsystem, reported in Fig. 2, employs a MOSFET with Diode component from the ‘Electrical’ PLECS component library. This switch uses an ideal MOSFET and is directly controlled by a digital signal from the controller. An optional on state resistance parameter can be included to closely model the real switch behavior. However, it is necessary to keep in mind that this model does not capture the switching transients and parasitic capacitances of the real device. Therefore, both the turn-on and the turn-off transitions are ideal and instantaneous, making it impossible to observe the ZVS operation of the converter.

Fig. 3 SPICE configuration of MOSFET subsystem with embedded minimal gate driver.

For this reason it is necessary to extend the MOSFET subsystem to a SPICE model, as shown in Fig. 3. For the primary and secondary MOSFETs, devices from Microchip are used [1]. The advantage of using a component with a twofold configuration is that the user can easily switch between the two models:

1. PLECS for fast simulations and control design,

2. PLECS Spice for accurate switching behavior analysis, such as proving ZVS operation,

while keeping the original schematic and thus the same control structure.

Since SPICE netlist modeling exists only in the electrical domain, it is necessary to include a gate driver to properly drive the MOSFET switch. In the case of this model, a minimal gate drive is included in the SPICE configuration of the MOSFET subsystem. It is worth highlighting that the signal coming from the controller has been conditioned to be compatible with the gate driver voltage level requirements for easier comparison between the two configurations.

Controller

This DAB is controlled using a single phase-shift modulation strategy, where the power flow is regulated by adjusting the phase-shift angle between the primary and secondary bridge voltages. The controller schematic is reported in Fig. 4.

Fig. 4 Voltage control scheme and single phase-shift modulator for DAB converter.

The complete control design is outside the scope of this specific demo model. For a more in depth study on the DAB control, refer to the Dual Active Bridge demo model. Moreover, the validation of the control strategy is also outside of the scope of this demo model, thus the details of the control design are not analyzed in this section.

The advantage of using PLECS Spice is that the controller design and implementation remain unchanged, as the power stage model is swapped without affecting the control structure. This allows for a straightforward control design using ideal component models, followed by validation of the switching behavior with detailed SPICE models. Since the schematic of Fig. 167 is a closed-loop control, the control signals might differ between the two configurations due to the dynamics introduced by the different switching behavior of the MOSFET’s SPICE configuration. In order to compare the two transitions at the same time instant, the open loop control is also available via an alternative configuration of the controlled subsystem, where the phase-shift angle is fixed by a power reference.

Simulation

Using the demo model

The demo model allows to:

1. Toggle between PLECS ideal and SPICE netlist-based MOSFET models using configurable subsystems without modifying the control logic or circuit topology. This is done by the simMode parameter in the the menu Simulation > Simulation Parameters… > Initialization

2. Adjust dead time parameters and observe their impact on the resonant discharge transient. This is done by the tdead parameter in the the menu Simulation > Simulation Parameters… > Initialization

3. Compare switching waveforms side-by-side to identify the transition from hard switching to ZVS.

4. Validate that the operating point and control strategy provide the required inductor current for successful soft switching.

In the following, this approach will be used to demonstrate ZVS operation by resolving the switching waveforms. Focusing on the analysis on ZVS operation, the model is simulated with two different dead time values: \(15~\mathrm{ns}\) and \(50~\mathrm{ns}\). The first will lead to hard switching operation, while the second will allow to achieve ZVS operation.

Hard switching operation

We first design a control strategy using the ideal MOSFET model in PLECS. The results of the high side switch of the primary bridge turn-on transition are reported in Fig. 5.

Fig. 5 Turn-on transition of primary bridge high side MOSFET with \(15~\mathrm{ns}\) dead time using PLECS ideal switch model.

This is not sufficient to demonstrate proper ZVS operation, as the ideal switch model does not include the parasitic capacitances of the MOSFET device. Using PLECS Spice, it is possible to seamlessly switch to a SPICE netlist-based MOSFET model, while keeping the same control structure and circuit topology. The results of the same turn-on transition using the SPICE model are reported in Fig. 6. We notice that the voltage across the MOSFET does not reach zero before the turn-on instant, indicating that ZVS operation is not achieved and hard switching occurs instead.

Fig. 6 Turn-on transition of primary bridge high side MOSFET with \(15~\mathrm{ns}\) dead time using SPICE netlist-based MOSFET model.

The ZVS problem is not solved for this converter operating point and control strategy. It is necessary to increase the dead time to allow the resonant discharge of the MOSFET parasitic capacitances.

Soft switching operation

After increasing the dead time to \(50~\mathrm{ns}\), the results of the high side switch of the primary bridge turn-on transition using the PLECS ideal switch model are reported in Fig. 7. When comparing these results with the previous ones in Fig. 5, it is not possible to notice any differences. The ideal switch model is again not suited to capture the switching transients of the real device.

Fig. 7 Turn-on transition of primary bridge high side MOSFET with \(50~\mathrm{ns}\) dead time using PLECS ideal switch model.

It is necessary to switch to the SPICE netlist-based MOSFET model to observe the actual switching behavior. The results of the same turn-on transition using the SPICE model are reported in Fig. 8. Note that the voltage across the MOSFET reaches zero before the turn-on instant, indicating a successful ZVS operation.

Fig. 8 Turn-on transition of primary bridge high side MOSFET with \(50~\mathrm{ns}\) dead time using SPICE netlist-based MOSFET model.

Conclusion

This demo clearly illustrates how device-level simulation extends PLECS’ capabilities by allowing analysis of complex problems like soft switching. Ideal models cannot reveal the resonant discharge dynamics that determine ZVS success. By comparing identical operating conditions with different dead times, the PLECS Spice simulations show the critical distinction between hard switching and ZVS. The MOSFET current and voltage waveforms provide direct confirmation of whether the design achieves soft switching, enabling engineers to optimize design, control strategy, and dead time settings all in the same simulation model and validate their design well before hardware implementation.

Bibliography

[1]

Microchip Silicon Carbide Products SPICE and PLECS Files. Click to access online: Microchip SiC SPICE models.