Three-Phase T-Type Inverter

Overview

This demonstration presents a three-phase T-type inverter for grid-tie applications that deploys Wolfspeed SiC MOSFETs. Fig. 1 shows the electrical circuit of the T-type inverter. This model exhibits how the device selection, controller parameters, and modulation approach influence the thermal performance of the inverter. By leveraging analysis tools and simulation scripts, the inverter performance is studied under several different operating conditions to ensure the system operates safely and efficiently.

Fig. 1 Electrical circuit of a three-phase T-type inverter

Model

The T-type inverter is similar to the three-level neutral-point clamped (NPC) inverter in that it adds an additional output voltage level at \(0\,\mathrm{V}\), thereby offering improved harmonic performance over a standard two-level inverter. Compared to an NPC inverter, the T-type inverter has a reduced part count due to the elimination of the clamping diodes, and reduced conduction losses of the outer switching devices, since only one device is used rather than two in series [1]. The disadvantage is that the blocking voltage is reduced compared to the NPC inverter since the outer switching devices are no longer in series. This can be overcome with modern wide-bandgap devices.

The demo model shows an example of a T-type inverter rated at \(22\,\mathrm{kVA}\) that converts an \(800\,\mathrm{V}\) DC-bus into a three-phase \(60\,\mathrm{Hz}\), \(480\,\mathrm{V}\) (line-line, rms) distribution for industrial applications.

Thermal

All \(12\) devices are configured to demonstrate the thermal loss performance of different Wolfspeed SiC MOSFETs. For the T-type inverter, it is common to have different switch types or even switch technology for the outer switches and neutral point-connected switch pair [1] [2]. The device types and parameters are defined in the Model initialization commands in the Initializations tab of the Simulation + Simulation Parameters… window. The outer switches and neutral-connected switches are defined separately to evaluate how the switch selection impacts the thermal performance of the inverter.

The model is configured with the device data for three different switch types, with the values below referenced to a junction temperature of \(25\,\mathrm{^\circ C}\):

• C3M0065100K SiC MOSFET rated for \(1000\,\mathrm{V}\) / \(35\,\mathrm{A}\) operation with an \(\mathrm{R_{dsOn}}\) of \(65\,\mathrm{m\Omega}\)

• C3M0032120K SiC MOSFET rated for \(1200\,\mathrm{V}\) / \(65\,\mathrm{A}\) operation with an \(\mathrm{R_{dsOn}}\) of \(32\,\mathrm{m\Omega}\)

• C3M0021120K SiC MOSFET rated for \(1200\,\mathrm{V}\) / \(100\,\mathrm{A}\) operation with an \(\mathrm{R_{dsOn}}\) of \(21\,\mathrm{m\Omega}\)

Alternatively, you can specify another Wolfspeed (or other vendor’s) device.

Device thermal modeling

Each semiconductor device is modeled as a subsystem with a custom mask configuration. The subsystem consists of a separate MOSFET and body diode, each with their own thermal model. The component mask has settings for several datasheet parameters such as on-resistances and body diode forward voltages. Specifying these parameters is important as it determines if the current is flowing through the MOSFET, body diode, or both conduction paths. This in turn can influence the switch losses. You also have the option to configure the gate resistance \(\mathrm{R_{g}}\) (consult with the manufacturer for recommended values), which will effect the switching loss calculation, as well as the number of devices specified in parallel. By increasing the number of parallel devices, it is possible to scale up the power requirements of the system and reduce the per-device stresses.

The average switching, conduction and total losses of the semiconductor devices can be calculated easily using the “Switch Loss Calculator” component. Select the switch components of interest in the schematic editor and drag them onto the probed components list of the “Switch Loss Calculator” block. For more details, browse the Help section of this block.

For more information on thermal modeling and the calculation of device losses and efficiency, see the demo model Buck Converter with Thermal Model.

Device assertions

The maximum operating conditions of drain-source voltage \(\mathrm{V_{ds}}\), drain current \(\mathrm{I_{ds}}\), and junction temperature \(\mathrm{T_{j}}\) for each device are entered from the manufacturer’s datasheet. The measured values during the simulation are compared with the rated values and are used to generate assertions, as shown in Fig. 2. A one-dimensional look-up table is used to dynamically adjust the continuous drain current limit as a function of case temperature \(\mathrm{I_{ds}(T_{c})}\).

Fig. 2 Implementation of thermal assertions

Fig. 3 shows a comparison between the look-up tables for the different devices, as extracted from the device datasheet. The assertions will generate warnings to alert the user if the device is operating outside of the safe operating area, as configured in the Assertion action field setting in the Options tab of the Simulation + Simulation Parameters… window, Options tab.

Fig. 3 Continuous drain current limit vs. case temperature for several devices

Controller

The high-level schematic of the “Controller” subsystem implementation is shown in Fig. 4.

Fig. 4 Top-level schematic of the “Controller” subsystem

Synchronous reference frame dq current controller

A decoupled synchronous reference frame current controller, shown in Fig. 5, is used to generate a dq voltage reference \(\mathrm{V^*_{dq}}\) for the modulator. The dq current controller regulates the inverter output currents to the desired set points, with separate PI regulators for direct and quadrature currents. The PI controllers include decoupling feedforward terms for the main output inductance. The phase angle for the voltage reference is measured using a library Three-Phase PLL (Phase-Locked Loop) block.

Fig. 5 Synchronous reference frame current controller implementation

Modulator

The \(\mathrm{V^{*}_{dq}}\) voltage reference value is converted to a three-phase voltage reference \(\mathrm{V^{*}_{abc}}\) using the PLL’s angle output. \(\mathrm{V^*_{abc}}\) is fed into the modulator, where the user can select between different modulation schemes. The resulting modulation index, \(\mathrm{m}\), is then used to generate a switching function with an optional dead time. Lastly, the switch signals are generated for each of the three inverter legs, as was shown in Fig. 1.

The “Modulator” component is implemented as a Configurable Subsystem. Since the modulation approach can significantly impact the semiconductor losses, different modulation approaches are implemented so they can be benchmarked against each other [2].

The simplest modulation scheme is the classical Sinusoidal Pulse Width Modulation (SPWM). The key drawback of the SPWM approach is that the inverter does not fully utilize the available DC-bus voltage; the modulation is linear only between \(\pm1.0\) times half of the DC-bus voltage. Zero sequence injection approaches can be used such that the linear range of the modulation index is extended to \(\pm2/\sqrt{3}\) times half of the DC-bus voltage [4].

A generic modulation signal \(e_i(t)\) can be divided into a component associated with the fundamental sinusoid \(e^{*}_{i}(t)=m_i\cdot {\rm sin}(\omega t + \phi_i)\) and a component associated with the zero sequence injection \(e^{0}_{i}(t)\), where the \(i\) subscript indexes each electrical phase of the converter and \(\phi_i\) is the associated phase shift. Since the injected signal is zero sequence, it means that a common signal is injected into all three phases and \(e^{0}_{a}(t)=e^{0}_{b}(t)=e^{0}_{c}(t)\).

This model compares the basic SPWM, where

\[\begin{aligned} e^{0}_{\rm SPWM,i}(t)=0 \end{aligned}\]

together with simple Space Vector PWM (SVPWM), Third Harmonic Injection PWM (THIPWM), Third Harmonic Zero Sequence PWM (THZSPWM), and Discontinuous PWM pattern 1 (DPWM1) [2] [4].

The simplified SVPWM and DPWM1 are based on comparing the minimum and maximum thresholds of the modulation indices to each phase. The THIPWM and THZSPWM approaches use the converter’s PLL to define the phase for the injected signal, where the THZSPWM is a sinusoidal approximation of the SVPWM waveform. Fig. 6 shows a comparison of different zero sequence injection waveforms along with a SPWM reference signal.

The injected zero sequence for each method in Fig. 6 is expressed as below.

\[\begin{aligned} e^{0}_{\rm SVPWM,i}(t) = - \frac{1}{2} \big({\rm max}(e^*_i(t)) + {\rm min}(e^*_i(t))\big) \end{aligned}\]

\[\begin{aligned} e^{0}_{\rm THIPWM,i}(t) = \frac{1}{6}{\rm sin}(3\omega t) \cdot\big(\frac{m\cdot\sqrt{3}}{2}\big) \end{aligned}\]

\[\begin{aligned} e^{0}_{\rm THZSPWM,i}(t) = \frac{1}{4} \big( {\rm sin}(3\omega t)-\frac{1}{10}{\rm sin}(9\omega t) \big)\cdot\big(\frac{m\cdot\sqrt{3}}{2}\big) \end{aligned}\]

\[\begin{split}\begin{aligned} e^{0}_{\rm DPWM1,i}(t) = \Bigg\{ \begin{array}{ll} 1-{\rm max}(e^*_i(t)) , & |{\rm max}(e^*_i(t))| \geq |{\rm min}(e^*_i(t))| \\ -1-{\rm min}(e^*_i(t)) , & |{\rm max}(e^*_i(t))| < |{\rm min}(e^*_i(t))| \end{array} \end{aligned}\end{split}\]

Fig. 6 Comparison of different zero sequence injection methods

Simulation

Run the simulation with the model as provided to observe the PWM signals for each phase leg, the output AC currents, the signals for devices \(\mathrm{S_{11}}\) and \(\mathrm{S_{12}}\), and the calculated losses of the system.

Steady-state analysis

Since the system will reach its final thermal operating point much slower than its electrical one, running the preconfigured Steady-State Analysis, accessible from the Simulation + Analysis tools… menu is recommended. The script is by default configured to compare SPWM and SVPWM modulation schemes, but different modulation indices can be compared by setting the modAnalyzeIdxs variable in the script.

In addition to the system-level electrical specifications, you can experiment with the controller settings by manipulating the modulation scheme, switching frequency, dead time, controller set points, and controller gains. Similarly, the device type, number of parallel devices, and the impact of external cooling or larger heatsinks could be analyzed. All of these settings will impact the loss behavior and system efficiency. If a device is operating outside of the safe operating area, a warning icon will appear in the bottom right hand of the simulation window, identifying which operating criteria were violated. The losses and the maximum continuous drain current \(\mathrm{I_{ds}}\) are both temperature-dependent and therefore are best assessed when all the thermal dynamics have reached a steady-state operating point.

Parameter sweep and simulation script

Since the power converter losses are sensitive to a large number of variables, a parameter sweep is an effective way to determine how design decisions impact the converter performance over a range of operating conditions. A simulation script is configured in the Simulation + Simulation scripts… that compares the different modulation approaches at peak current output for varying power factor angles. The script runs a Steady-State Analysis for each case, since the losses are sensitive to the steady-state device temperatures.

• Blockset: The simulation script in PLECS Blockset simulates each operating condition sequentially.

• Standalone: In PLECS Standalone, the simulation script runs several simulations in parallel. Refer to the Buck Converter with Parameter Sweep for a more comprehensive explanation of the parallel simulation scripting feature.

The results of the parameter sweep are shown in Fig. 7 where a single C3M0021120K is chosen for the outer switches and two parallel C3M0065100K devices are chosen for the neutral-connected switches. The topmost plot shows the overall losses of the power converter, while the bottommost plot shows the device junction temperatures for one outer switch (denoted as “S1” in graphic legend) and one neutral-connected switch (denoted as “S2” in graphic legend). Each run that has an assertion is marked with a red cross (x), indicating the device operated outside of the safe operating area during the simulation.

As of PLECS 4.4, Octave plots can be generated within a PLECS Standalone simulation script or initialization script. Fig. 7 was generated directly in PLECS from the results of the parameter sweep. Alternatively, the results can be exported in other formats supported by Octave, such as *.mat or *.csv.

One can observe that at unity power factor DPWM1 has the lowest losses, followed by SPWM. However, when the power factor angle approaches normalized power factor angles of \(0.5\), these two methods show the highest losses, and the neutral-connected devices will operate outside of the safe operating area. The SVPWM approach shows a \(15\,\%\) reduction in losses compared to DPWM1 for the same operating scenario. One proposed technique is to dynamically adjust the modulation strategy based on the operating conditions to achieve the lowest overall losses [2].

Fig. 7 Total losses and device temperatures for different modulation schemes

Conclusion

This model highlights a three-phase T-type inverter for an industrial distribution network application. It makes use of simple plant and controller designs in order to highlight the thermal modeling capabilities of PLECS. This model can serve as an example for studying controller design influence on efficiency for other topologies.

Bibliography

[1]

M. Schweizer and J. W. Kolar, “Design and Implementation of a Highly Efficient Three-Level T-Type Converter for Low-Voltage Applications,” in IEEE Transactions on Power Electronics, vol. 28, no. 2, pp. 899-907, Feb. 2013. Click to access online: IEEE Xplore webpage.

[2]

E. Serban, C. Pondiche, and M. Ordonez, “Power-loss analysis in 3-level TNPC inverters: Modulation effects,” in 2017 IEEE Energy Conversion Congress and Exposition (ECCE), Cincinnati, OH, 2017, pp. 490-497. Click to access online: IEEE Xplore webpage.

[3]

E. Serban, C. Pondiche and M. Ordonez, “Modulation Effects on Power-Loss and Leakage Current in Three-Phase Solar Inverters,” in IEEE Transactions on Energy Conversion, vol. 34, no. 1, pp. 339-350, March 2019. Click to access online: IEEE Xplore webpage.

[4]

K. Zhou and D. Wang, “Relationship between space-vector modulation and three-phase carrier-based PWM: a comprehensive analysis three-phase inverters,” in IEEE Transactions on Industrial Electronics, vol. 49, no. 1, pp. 186-196, Feb. 2002. Click to access online: IEEE Xplore webpage.