PLL (Single-Phase)

Purpose

Implementation of a single phase PLL

Library

Control / Continuous

Description

This block implements two different types of a single-phase Phase Locked Loop (PLL). The single-phase PLL component provides at its output terminals an estimation of the input signal frequency, signal amplitude and the phase-angle.

PLL Types

Three fundamental blocks can be identified in a basic single-phase PLL structure.

• Phase detector: Generates an output signal that is proportional to the phase difference between the input signal and the signal generated by the PLL itself.

• Controller: Usually a PI controller to attenuate high-frequency components and to eliminate the steady-state phase-error.

• Frequency/phase-angle generator: Generates a phase-angle signal based on the estimated angular frequency. Typically, this block is constituted by a wrapping integrator.

Fig. 152 Basic structure of a single-phase PLL

Two different types of a single-phase PLL are implemented. The main difference between the two methods is how the phase detector works. Please note that both PLL implementations use an amplitude normalization scheme. Therefore, information about the nominal input signal amplitude is not needed.

Enhanced PLL

The performance of the basic PLL implementation is enhanced by filtering the input signal with an adaptive notch filter (ANF). When the input signal has the same phase-angle and frequency as the estimation of the PLL itself, the output of the ANF becomes zero. Due to this, oscillations at the output of the phase detector are canceled out and the signal phase-angle is accurately estimated by the basic PLL structure.

Fig. 153 Enhanced structure with adaptive notch filter

SOGI

Fig. 154 General structure of the SOGI adaptive filter

This implementation uses an ortogonal signal generator based on second order generalized integrator (SOGI). Based on the input signal, two sine waves with a phase shift of \(90^\circ\) are generated. The first of the two components has the same phase and magnitude as the fundamental of the input signal. From the structure given in above figure the following relevant transfer functions of the structure can be derived:

\[\frac{V_\alpha(s)}{V(s)} = \frac{k \omega' s}{s^2 + k \omega' s + \omega ^{'2}}\]

\[\frac{V_\beta(s)}{V(s)} = \frac{k \omega ^{'2}}{s^2 + k \omega' s + \omega ^{'2}}\]

To avoid problems due to input signal frequency fluctuations the resonance frequency \(\omega'\) is provided by the estimated frequency of the PLL structure. The filtering effort can be adjusted with the filter gain \(k\). If \(k\) decreases, the bandpass filter will become narrower resulting in heavier filtering, but resulting in a slower system response. Especially when working under distorted grid conditions reducing the filter gain \(k`\) may be beneficial.

Parameters

Basic

PLL type

Specifies the PLL type. The single-phase PLL can be of type Enhanced PLL or SOGI. For further explanations on the different PLL implementations see PLL types above.

Nominal frequency

The nominal frequency of the fundamental component in hertz or radians/second, see below.

Nominal input voltage

The estimated nominal peak voltage of the input signal in volts \((\mathrm{V})\). This value is needed to correctly initialize all states in the PLL structure. If this information is not known, this parameter can be set to zero.

Initial phase-angle

The initial phase-angle of the input signal in rad, per unit \((\mathrm{p.u.})\) or degrees, see below. The parameter value should be in the range \([0, 2\pi]\), \([0, 1]\) or \([0, 360]\) respectively.

Sin/Cos output

Activates an additional signal output terminal (on) with an unitary signal synchronous with the input signal. In addition also a \(90\) degree delayed signal is provided. If the parameter is set to off, the signal terminal is hidden.

Units for frequency and phase

The frequency and phase can be expressed in terms of (rad/s, rad), (Hz, p.u.) or (Hz, degrees). If the phase is expressed in per unit \((\mathrm{p.u.})\), a value of \(1\) is equivalent to the period length of the nominal frequency. This parameter also changes the unit of the frequency output of the PLL component.

Controller design

Controller design

Specifies the controller design approach. If the parameter is set to Basic, the PI controller gains are automatically set to have a settling time of approximately \(0.06\) seconds. By using the Advanced approach, the user can specify the controller gains Kp and Ki and the filter gain k freely. Please note, that it is not required to scale the controller gains by the rated input signal amplitude since the input signal is normalized.

Proportional gain Kp

The proportional gain of the PI controller. This parameter is shown only if the Controller design parameter is set to Advanced.

Integral gain Ki

The integral gain of the PI controller. This parameter is shown only if the Controller design parameter is set to Advanced.

ANF gain k

Changes the filter bandwidth of the adaptive notch filter in the enhanced PLL structure. This parameter is shown only if the Controller design parameter is set to Advanced and the PLL type parameter to Enhanced PLL.

SOGI filter gain k

Changes the filter bandwidth of the SOGI structure. Reducing k leads to a narrower bandpass-filter. This parameter is shown only if the Controller design parameter is set to Advanced and the PLL type parameter to SOGI.

Probe Signals

Theta

The estimated phase-angle of the input signal.

Amplitude

The estimated amplitude of the input signal.

Frequency

The estimated frequency of the input signal.

Sin/Cos

A unitary fundamental signal running synchronous with the input signal and a \(90\) degree delayed signal of it.

Input Signal

The input signal of the PLL block.

References

• R. Teodorescu, et. al., “Grid Converters for Photovoltaic and Wind Power Systems”, John Wiley & Sons Ltd., 2011.