Using PLECS Spice
Netlist Component
Fundamentals
To include a SPICE model in a schematic, we use the Netlist component. It enables both writing circuit descriptions manually and importing a netlist from a file.
For example, by manually copying the netlist corresponding to the Example RC Circuit in the dialog of a netlist component, we obtain the schematic depicted in Fig. 126.
Fig. 126 Netlist description of an RC circuit
The first subcircuit located at the top of a netlist (the one defined by the
first .SUBCKT and its corresponding .ENDS) is called the main subcircuit.
The name of the main subcircuit is shown on the Netlist component in the schematic.
Similar to a standard PLECS subsystem, a Netlist component
can be resized by dragging one of its corners.
Nodes listed after the main subcircuit name in the .SUBCKT statement are exposed as terminals
on the PLECS schematic. They can be used to connect SPICE models to other
compatible components.
To move a terminal, hold Shift and drag it along the edges of the component.
Fig. 127 Netlist with exposed terminals and ground connection
Note
Some netlists do not reference ground (node 0) explicitly, but expose instead a terminal
(often called GND) that must be grounded in the schematic using an
Electrical Ground.
Warning
Electrical Grounds in PLECS electrical circuits are not connected to electrical grounds in SPICE electrical circuits.
PLECS Spice solvers are capable of simulating mixed-signal hybrid schematics that contain both standard PLECS and SPICE electrical circuits.
As an example, let us study the difference between the reverse recovery of a detailed device-level SPICE diode model and that of a parametrized Diode with Reverse Recovery from the standard PLECS library.
Fig. 128 Comparison of a SPICE diode model with the standard PLECS diode with reverse recovery. The top circuit contains an ideal diode. The bottom circuit contains a SPICE model. Both circuits are driven and measured by the same standard PLECS controls.
Fig. 129 Scope measurements from the schematic shown in Fig. 128.
SPICE Highlighting
After running a PLECS Spice simulation, the 
icon appears in the bottom right corner
of the schematic window.
Pressing it will open the diagnostics window and highlight the electrical circuits that are
solved using the Modified Nodal Analysis formulation.
Parts of the schematics that are not highlighted are solved using the standard PLECS state-space
formulation.
Fig. 130 Pressing the SPICE icon highlights physical models that are simulated using MNA
The Netlist Dialog
The Netlist component dialog provides five tabs for configuring a netlist, customizing terminal labels, defining probe signals, setting parameters and adding an icon.
Netlist Tab
A SPICE netlist description is included in a Netlist component using the Netlist tab. It can be written/edited directly in the provided text dialog or imported form a file using using the Import Netlist button.
Writing Netlists
Netlists must follow the .SUBCKT Statement syntax introduced in Fundamentals. The Netlist Cheat Sheets provide a quick overview of the format.
Importing Netlists
Click on the import option of the netlist component dialog to import a netlist from a file.
PLECS Spice will parse the selected file and provide a drop-down menu with all available subcircuits
(starting with .SUBCKT), models (starting with .MODEL) as well as the top level circuit (terminated with .END).
The importer automatically populates the text field based on your selection:
If you choose a subcircuit: It is copied to the top of the text field (as the main subcircuit), and all its dependencies are automatically appended.
If you choose a model: It is automatically wrapped within a new main subcircuit.
If you choose the top level circuit: It is wrapped into a subcircuit. All dependencies are automatically appended. You will have to manually list the nodes that you want to expose.
The preview window is used to fix errors occurring during the import process.
Note
Importing a netlist will overwrite previously written/imported content.
Note
When the dependency detection encounters errors or parametric subcircuit names, you are prompted to choose between two options:
Append all detected dependencies: Includes only dependencies up to the error or with the current parameterization.
Append entire file: Includes all content from the file, guaranteeing no dependencies are missed. This results in larger file size and slower simulation initialization.
Fig. 131 A netlist import dialog with an example netlist.
Diagnostics
After parsing the netlist, PLECS Spice displays diagnostics for syntax violations and additional debugging information, as shown in Figure Fig. 133.
Fig. 133 Netlist showing several diagnostics.
Diagnostic messages appear in a table below the netlist editor. Click a message to navigate to the corresponding line in the text field. For messages referring to multiple lines, clicking the message repeatedly cycles through the relevant text snippets. This feature is particularly useful to debug a SPICE model or adapt the syntax of a netlist to PLECS Spice.
Messages are categorized as errors, warnings, or informational notes:
Errors must be resolved before PLECS Spice can simulate.
Warnings indicate that PLECS Spice may automatically adapt to an unsupported netlist statement (for example, by ignoring an unrecognized parameter).
Information messages provide additional context without requiring action.
Note
When importing a netlist, the parser is unaware of parameter overwrites. In rare cases, this can lead to a diagnostic that is inconsistent with the one obtained after parameters are evaluated or at the start of a simulation.
Terminals Tab
The Terminals tab allows renaming terminals of the Netlist component corresponding to exposed nodes without modifying the netlist itself. This is useful to assign standardized or meaningful names to schematic terminals.
Examples:
1,2,3\(\rightarrow\)drain,gate,sourceD,G,S\(\rightarrow\)drain,gate,source1,2,3\(\rightarrow\)Vin,Vout,GND
Fig. 134 Renaming netlist terminals.
Probes Tab
The Probes tab enables you to define probe signals for the Netlist component. These probe signals can directly be used in a Probe or in a Masked Configurable Subsystem, making it easier to switch between configurations and keeping probes valid.
We currently support five types of probes:
Terminal voltage probes measure the potential difference between two terminals of the Netlist component.
Terminal current probes measure the current flowing in through the specified terminal of the Netlist component.
Nodal voltage probes measure the nodal voltage at an internal node of the netlist.
Element voltage probes measure the potential differences across two-node elements of a netlist.
Element current probes measure the current in a two-node element in the netlist.
The terminal-based probes offer a selection dialog based on the terminal names in the Terminals Tab. The internal probes selection tool offers a tree view of the nodal voltages and the two-terminal elements that exist in the parsed netlist. This tree structure represents the hierarchy how subcircuits call each other.
Fig. 135 Probing netlist voltages and currents.
Parameters Tab
The Parameters tab allows you to overwrite the default values of optional parameters defined in the main subcircuit (specified after PARAMS: in the subcircuit declaration), e.g.
.SUBCKT netlist n1 n2 PARAMS: a=1 b=2 c=3
Overwrite values are parsed using the Octave engine. They can reference variables from your schematic’s Model Initialization Commands. This enables parameterization of device models and parameter sweeps.
The Parameters Tab also supports vectorized inputs (e.g., [1 2 3]), which vectorizes the Netlist component in the same way as standard PLECS components (see Vectorization).
Fig. 136 Overwriting netlist parameters.
Icon Tab
You can also define a custom icon for your netlist component via the Icon tab. As an example, let’s add an icon for the diode in Fig. 128.
Fig. 137 Defining a custom diode icon.
The diode icon is constructed from a triangle and three individual straight line elements and is scripted using the Lua Language.
Furthermore, it is possible to display an arbitrary netlist name via the command: Icon:text("My netlist name").
A detailed description of the input dialog and the available Lua commands is available here.
Netlist File Reference Component
The Netlist File Reference component is a variant of the Netlist component that does not store the netlist in an editor. Instead, the netlist is imported at runtime from a file.
Fig. 138 Netlist file reference setup to match the import depicted in Fig. 132.
- Advantages of the Netlist File Reference component
The file and imported model / subcircuit can be specified and changed using variables.
Modifications to the referenced file affect all dependent simulations.
Simplifies Building libraries for semiconductor device families.
Avoids storing netlists as hard copies in the .plecs file.
- Advantages of the Netlist component
Diagnostics are available in the netlist editor, including warnings and infos.
Node names and parameter names in the Terminals Tab and Parameters Tab are automatically updated upon editing the main subcircuit.
Internal probes are supported.
Modifications in the netlist editor are local and do not affect other simulations.
The .plecs file is self-contained and can be shared without having to send additional files.
In most cases, importing a netlist into the Netlist component is the recommended workflow.
Best Practices
Use Configurable Subsystems
To add device-level detail using SPICE models without abandoning your existing PLECS schematic, use Configurable Subsystems to switch between PLECS and SPICE implementations of the same circuit.
Consider a buck converter with controls in the digital domain.
Fig. 139 PLECS Buck converter with peak current controller
To add SPICE device models, we wrap the power stage components in a configurable subsystem with two configurations:
PLECS configuration: Uses ideal PLECS components (MOSFET, diode)
SPICE configuration: Uses netlist components with detailed device models
Using this configurable subsystem approach, we add the netlist components alongside the original PLECS components.
Fig. 140 Configurable subsystem for switching between PLECS and SPICE configurations.
The active configuration can be controlled directly in the schematic or through a variable defined in the initialization commands or in a script, making it easy to compare ideal and detailed simulations.
This approach is particularly powerful because:
The digital control section remains unchanged between configurations
Switching between ideal and detailed simulations is quick and easy
By holding traces, you can plot both simulations in a single scope
There is no need to maintain separate model files or rebuild circuits
Use Masked Subsystems
When using configurable subsystems, creating a custom mask to visually represent the devices contained in the subsystem, makes the schematic more intuitive.
Fig. 141 A masked subsystem can be have an icon representing its contents.
In the mask editor, probe signals defined in the netlist can be accessed and used to define Mask Probe Signals. Probing the subsystem returns the MOSFET’s channel voltage from either the PLECS component or SPICE netlist, depending on the current configuration.
Fig. 142 The Probes tab of a masked subcircuit, defining Mask signals by referencing components from its configurations.
Use Model References
When reusing a SPICE device in a circuit, use the Model Reference component with Netlist components to automatically propagate netlist, parameter, or probe changes to all instances. Wrapping the netlist into a subsystem allows mask parameters to be set independently for each model reference to the subsystem.
Use Custom Libraries
For frequently reused netlists across circuits, create custom Libraries to maintain a collection of SPICE device models for easy project integration.
To create a custom library element:
Import the subcircuit of interest into a Netlist component.
Change the terminal labels, define probes signals and define an icon.
Save this component in your custom library.
Building libraries for semiconductor device families
Semiconductor manufacturers often bundle the SPICE models of several devices into a single file. Such a file typically contains several top-level SPICE subcircuits along with helper circuits.
We recommend the following approach to generate a custom library for a family of semiconductor devices:
Use the Netlist File Reference component and use a variable for the input field Name.
Set up the terminals and define probes.
Wrap this component into a masked subcircuit with icon.
Set up the mask dialog by defining a new string-valued combo box parameter with the aforementioned variable name.
Store all SPICE subcircuit names of interest as combobox options.
Save this subcircuit in a PLECS library next to the netlist file.
Example Model
See the example model “Netlist File Reference for Device Families”.
Find it in PLECS under Help > PLECS Documentation > List of Example Models.
SPICE Simulation Parameters
With a PLECS Spice license, additional settings are accessible in the Simulation Parameters.
New Solver Options
On the Solver page of the Simulation Parameters, new SDIRK and ESDIRK solvers are available for Mixed-Signal Hybrid Simulation of hybrid PLECS and SPICE models; these appear under the Solver setting when Solver Type is set to Variable-step. When the Solver is set to auto and any circuit part requires the modified nodal analysis formulation, ESDIRK is automatically selected as default solver.
As a general rule of thumb, ESDIRK is usually faster, but SDIRK is typically more stable.
Attention
Selecting either of these new solvers manually does not force a circuit to be solved the SPICE way using Modified Nodal Analysis. This is purely dependent on the components.
SPICE Simulation Parameters
On the new SPICE page in the Simulation Parameters, you can change the following:
Transient Analysis Options
- Max. number of iterations
Limits the number of Newton iteration per implicit stage. When the solver does not converge within the iteration limit, the current step size is reduced and a smaller one is attempted.
- Max. number of threads
This sets the number of threads the solver may use in the current simulation. An upper limit is given by the Thread limit in the PLECS preferences. At most, the number of physical CPU cores on your machine are used.
Note
The options specified in Variable-Step Solver Options also do affect the transient analysis during SPICE simulations.
Operating Point Analysis Options
- Max. number of iterations
This limits the number of Newton iterations<section-spice_newton during the operating point analysis.
- Tolerances
The relative and absolute tolerances specify the acceptable local integration error during the operating point analysis. Additionally we offer the option to set a tolerance for nodal voltages computed during the analysis. Note that these tolerances by default have different scales.
- Bypass operating point
When set to on, the operating point analysis is skipped and the simulation starts from zero. Initial conditions are ignored. This setting is not recommended.
- Initial conditions
When set to off, user-provided initial conditions are ignored. The solver performs a standard SPICE operating point analysis.
When set to on, the operating point analysis attempts to find a consistent state that also satisfies the initial conditions given by PLECS Components Compatible with SPICE and the .IC statements in netlists.
Parameter Settings
- .temp
The default temperature used for SPICE circuits. See Temperature (.TEMP) for details.
Diagnostics
Several settings are available for configuring how diagnostics are displayed.
- Netlist parser details
When set to show, warnings and info messages from netlists are listed with other information in the diagnostics window of PLECS, accessible from the bottom right corner of a schematic. Regardless the setting, this information is always accessible in the dialog of the Netlist component.
- Invalid netlist function evaluation
Netlists may contain user-defined functions. In some ill composed netlists, these functions need to be evaluated outside of their domain, e.g. the logarithm might be evaluated using a negative number. When set to ignore, we extend the domain of all functions to \(\mathbb R\). See Mathematical Functions for details.
- Incompatible initial condition
Both PLECS Components Compatible with SPICE and .IC statements may specify initial conditions. In the beginning of the simulation we analyze whether satisfying these initial conditions is feasible. A capacitor parallel to a voltage source, for example, can not specify an initial voltage across. If there are contradicting initial conditions, we automatically ignore some of them to fix the system. All of those are listed in the schematics diagnostics when not set to ignore.
PLECS Components Compatible with SPICE
List of Compatible Electrical Components
The following standard PLECS components are natively supported in SPICE circuits (see Mixed-Signal Hybrid Simulation):
- Meters
- Passive Components
- Manual Switches
- Electronics
Additional Limitations
All the connections of wire multiplexers and wire selectors share the same mathematical formulation. Thus, it is not possible to create a bus bundling wires from standard PLECS and SPICE circuits.
During a mixed-signal simulation, live changes to parameters and manual switch states are not permitted. Attempting to do so, e.g., via a script, the RPC-interface, or the user interface, raises an error.
Example Model
See the example model “Creating simple diodes in PLECS Spice”.
Find it in PLECS under Help > PLECS Documentation > List of Example Models.
Netlist Cheat Sheets
This section provides examples explaining how to use netlists in PLECS Spice.
* This is a comment.
* Subcircuit definitions start with .SUBCKT and end with .ENDS.
* The following subcircuit is called "main" and has nodes "n1" and "n2".
.SUBCKT main n1 n2; The semicolon starts an inline comment.
.PARAM a=100; This defines the parameter "a".
.PARAM c=1e-6 r=1e3; This defines parameters "c" and "r".
.PARAM l={a*c}; Expressions in curly braces are evaluated.
R1 n1 0 1e3; This is a 1 kiloohm resistor between nodes n1 and ground.
* The node "0" always denotes ground.
R2 n2 0 {r}; The resistance of "R2" is given by the parameter "r".
C1 n1 n3 {c}; This is a capacitor. Node "n3" is internal and not exposed on the schematic.
L1 n3 n1 {l}; This is an inductor.
.ENDS
* Subcircuits can have parameters.
* The main subcircuit parameters can be changed in the PLECS UI of the netlist component.
.SUBCKT main d g s a c PARAMS: is=1e-9 vto=3.5
* Define compact models using .MODEL statements.
.MODEL dio D; This model called "dio" loads the default diode model.
.MODEL mos1 NMOS; This model called "mos1" loads the default NMOS model.
.MODEL mos2 NMOS IS={is} VTO={vto} LEVEL=3; This model sets additional parameters.
* Add circuit elements using the previously defined models.
D1 a c dio; This creates a diode based on the model "dio".
D2 a c dio; We can create several elements with the same model "dio".
M1 d g s s mos1; The last MOSFET node - bulk - is typically connected to source.
.ENDS
.SUBCKT main n1 n2 n3 n4 n5 n6 n7 n8
.PARAM a=1 b=2
.FUNC fun(x, y) = {cos(x) * y + b}; This defines a function with variables x and y.
V1 n1 0 1; This is a 1 Volt DC voltage source.
I1 n2 0 1; This is a 1 Ampere current source.
* Sources with user-defined current or voltage use the letter B.
B1 n3 0 V={sin(TIME)}; The voltage of this source is given by sin(TIME), where TIME is the current simulation time.
B2 n4 0 V={fun(TIME, a)}; This evaluates the previously defined function as "cos(TIME)*1+2".
B3 n5 0 I={V(n8)}; The current of this source is given by the nodal voltage V(n8).
B4 n6 0 I={I(V1)}; The current of this source is given by the current of voltage source "V1".
B5 n7 0 V={if(V(n8)>0, tanh(V(n8)-1)/2, 0)}; When V(n8)>0 then tanh(V(n8)-1)/2 else 0.
* To mitigate convergence issues the equation above is designed to be continuous and differentiable.
.ENDS
* This is the main subcircuit.
.SUBCKT main n1 n2 n3 n4 n5
.PARAM a=0
.PARAM c=3
X1 n1 n2 helper1; This creates an instance of the "helper1" subcircuit between nodes "n1", "n2".
X2 n3 0 helper1; Several instances can be created. The ground node "0" can be used here.
X3 n4 n5 helper2 PARAMS: b=4; Specifying parameters overwrites the defaults defined in the subcircuit.
* The three lines above create a total of six resistors:
* 1 Ohm between n1 n2 (R1 in X1)
* 1 Ohm between n3 and ground (R1 in X2)
* 1 Ohm between n4 and n5 (R1 in X3)
* 4 Ohm between n4 and n5 (R2 in X3) (X3 overwrites the subcircuit parameter b)
* 3 Ohm between n4 and n5 (R3 in X3)
* 10 Ohm between n4 and ground (R4 in X3)
.ENDS
* This is a helper subcircuit.
.SUBCKT helper1 local1 local2
R1 local1 local2 1
* Nodes from the main subcircuit such as "n1" cannot be accessed here.
.ENDS
* This is parameterizable helper subcircuit.
.SUBCKT helper2 n1 n2 PARAMS: a=1 b=2
* Nodes "n1" and "n2" are local and not connected to the nodes "n1", "n2" of the main subcircuit.
* Parameters, functions, and models from the calling subcircuit are also accessible here
R1 n1 n2 {a}
R2 n1 n2 {b}
R3 n1 n2 {c}; Since c is not defined here, c=3 from the subcircuit creating this instance is used.
R4 n1 0 10; The ground node "0" is the same globally.
.ENDS
For technical details on using netlists, we refer to Netlist Syntax Reference.
Differences to Text-Based SPICE Simulators
PLECS Spice offers Mixed-Signal Hybrid Simulation, coupling PLECS and SPICE circuits via a single intuitive user interface. To allow for this tight integration, we refrain from creating an intermediate netlist file before parsing. Such files often contain additional solver settings, plotting and measurement instructions, or sweep parameters. In PLECS Spice, netlists are solely used for describing subcircuit models in the Netlist component.
In the following, we explain how to use the PLECS UI instead of text-based commands.
Parameter Sweeps (.STEP)
PLECS Spice offers two different approaches to carry out parameter sweeps:
Simulation Scripts to simulate a circuit sequentially for several parameter values
Vectorization to simulate several parameter values simultaneously.
By exposing netlist parameters in the Parameters Tab, you can sweep over them like over any other parameter in standard PLECS.
Warning
Using Vectorization for a sweep parameter multiplies the system size by the number of sweep values and can severely affect simulation speed. Therefore, it is recommended to use the scripting functionality for carrying out parameter sweeps in large simulations.
Temperature (.TEMP)
Compact models in SPICE behave differently depending on the temperature of the circuit.
In PLECS Spice, you can set this temperature globally in the Parameter Settings.
To sweep temperature, you can define a variable for .temp and vary that variable in a Simulation Script.
Example Model
See the example model “Temperature Sweep in PLECS Spice”.
Find it in PLECS under Help > PLECS Documentation > List of Example Models.
Note
If you define a parameter called temp in a subcircuit, it will overwrite the global setting for all user-defined functions in this subcircuit and all referenced subcircuits.
However, compact models will still read the global temperature setting, unless you explicitly pass TEMP={temp} as instance parameter when creating the semiconductor element.
Measuring Quantities of Interest (.MEAS)
In PLECS Spice, you can directly probe voltages and currents using Voltmeters, Ammeters, and via the Probes Tab. You can use the PLECS Scope to analyze these measurements or process them via the control domain in standard PLECS.