Single-Phase Inverter
Overview
This demo model features a single-phase grid-connected inverter operating at \(50\,\mathrm{kW}\) and unity power factor. This document describes the implementation of the power stage and controls using the PLECS electrical and control domains.
The model consists of one subsystem. Inside the subsystem the model is split into plant and controller parts. The subsystem is deployed on one single RT Box. For such a “virtual prototyping” configuration the RT Box has front connection with two 37 pin Sub-D cables to loop back PWM signals and analog measurement of the same Box. Virtual prototyping is a potential first step when developing real-time models for Hardware-in-the-loop (HIL) or rapid control prototyping (RCP) applications.
The chosen discretization step sizes and average execution times for each core on the RT Box are shown in Tab. 1. Real-time execution on the RT Box requires the model to execute using a fixed-step solver. The discretization step size parameter specifies the base sample time of the generated code and is used to discretize the physical model and control domain state-space equations. The execution time represents the actual time it takes to execute one discrete step of the PLECS model on the RT Box hardware.
Core 0: exec. time / step size |
Core 1: exec. time / step size |
|
|---|---|---|
RT Box 2, 3 or 4 |
\(1.9\,\mu\mathrm{s}\) / \(2.5\,\mu\mathrm{s}\) |
\(1\,\mu\mathrm{s}\) / \(62.5\,\mu\mathrm{s}\) |
RT Box 1 |
\(2.4\,\mu\mathrm{s}\) / \(2.5\,\mu\mathrm{s}\) |
N/A |
Requirements
To run this demo model, the following items are needed (available at www.plexim.com):
One PLECS RT Box and one PLECS and PLECS Coder license
Follow the step-by-step instructions on configuring PLECS and the RT Box in the Quick Start guide of the RT Box Target Support Package Documentation.
Two 37 pin Sub-D cables to connect the box in loop-back setup at the front panel.
Note that this demo model is primarily intended to showcase the RT Box multi-tasking mode. The RT Box supports multi-tasking on a single CPU core or, if available, distributed across multiple CPU cores:
When the target is an RT Box 2, 3 or 4, the main CPU core (Core 0) runs the plant as “Base task” with a sample time of
Ts_plant. Another core (Core 1) runs closed-loop controls in “Controller” task in parallel with a sample time ofTs_controller, which is much slower and usually equals the switching period of the converter. In this way, the multi-core feature of the RT Box 2, 3 or 4 is showcased by splitting the computational effort onto different cores. Besides, the setup can easily transition to a HIL or RCP test later on.However if the user has only a single RT Box 1 available, this model can also run with the multi-tasking feature onto the only CPU core of the RT Box 1, but in a pre-emptive multi-tasking fashion. In this case, the “Base task” is doing the plant calculation with the highest priority with a sample time of
Ts_plant. The “Controller” task is executed as a background task with lower priority at the sample time ofTs_controller.
Please check the setting under Scheduling tab of the Coder options… window.
Note
Model
The top-level schematic contains one subsystem including both the plant and controller parts, as shown in Fig. 1. The subsystem is enabled for code generation from the Edit + Subsystem + Execution settings… menu. This step is necessary to generate the model code for the RT Box. Additional delays in the feedback path are also modeled.
Fig. 1 Top-level schematic of the single-phase inverter model
Power Circuit
The power circuit is supplied by a DC voltage source with \(V_{\rm dc} = 750\,\mathrm{V}\). The H-bridge has been implemented using the Full-Bridge Inverter component available in the Nanostep section of the PLECS library. The RT Box’s Nanostep solver simulates the converter with time steps in the single-digit nanosecond range. The switching signals \(Q_{\rm 1}, Q_{\rm 2}, Q_{\rm 3}\) and \(Q_{\rm 4}\) are captured by the PWM Capture block from the PLECS RT Box Target Support library. The sampling interval is 7.5 nanoseconds on the RT Box 1 and CE and 4 nanoseconds on the RT Box 2, 3 and 4, which is the Nanostep solver execution interval. The output of the H-bridge is connected to the power grid via a filter inductor and a circuit breaker. The low voltage power grid is modeled by an ideal AC voltage source with \(V_{\rm rms} = 220\,\mathrm{V}\) and \(f = 50\,\mathrm{Hz}\). The measurements of DC voltage, grid voltage and grid current are routed out of the subsystem via Analog Out components from the PLECS RT Box Target Support library. The scaling factors and offsets are configured to limit the analog output voltages within the range \([-4\,\mathrm{V},\,+4\,\mathrm{V}]\).
Fig. 2 Power circuit of the single phase grid-connected inverter
Controls
The closed-loop controller regulates the line current to be in phase with the grid voltage.
Fig. 3 Controller model of the single-phase grid-connected inverter
A phase-locked loop (PLL) based on the quadrature signal generator is included to detect the electrical angle and frequency of the power grid. More details about this PLL structure have been introduced in [1].
The phase angle output of the PLL is converted into the reference signal of the grid current via one Trigonometric Function block and a proportional gain \(I_{\rm p}\). \(I_{\rm p}\) indicates the amplitude of the desired grid current. The internal structure of the current controller is realized by a proportional-integral (PI) regulator. The parameters \(K_{\rm p}\) and \(K_{\rm i}\) of the PI regulator are set using the Optimum Magnitude rule. More details about the parameter calculation are included in the description of the “Boost Converter” demo model of the RT Box Target Support Package. Moreover, the anti-windup logic is included, and the gain \(K_{\rm bc}\) is determined by \(K_{\rm bc} = K_{\rm i}/K_{\rm p}\).
At the output of the regulator, a feedforward of the grid voltage is added to improve the transient response. After that, the signal is divided by the DC voltage and fed to the PWM Out block as a modulation index. The PWM Out block has been configured to be synchronized with the execution step size of the controller, if this model is programmed into the real-time target.
Simulation
This model can run both, in offline mode on a computer or in real-time mode on the PLECS RT Box. For the real-time operation, one RT Box (referred to as “Plant + Controller”) needs to be set up as demonstrated in Fig. 4.
Fig. 4 Hardware configuration for the real-time operation on a single RT Box
Please follow the instructions below to run a real-time model on a single RT Box:
Connect the Analog Out interface to the Analog In interface with one DB37 cable, and the Digital Out interface to the Digital In interface with another DB37 cable (as shown in Fig. 4).
From the System tab of the Coder options… window, select the “Plant + Controller” subsystem and Build it onto the RT Box.
Once the model is uploaded, from the External Mode tab of the Coder options… window, Connect to the RT Box and Activate autotriggering.
Note
As shown below, the Manual Signal Switch in the “Controller” task in its default “up” position enables switching and connects the circuit breaker on the grid side, once the model is up and running.
Changing it to the “down” position trips all PWMs into the safe state, resets the PI Controller integral part to its initial condition, and also disconnects the circuit breaker on the grid side.
The PWM safe state is configured in the Protection tab of the PWM Out block.
Fig. 5 Real time measurements and intermediate signals obtained with PI regulator in the RT Box “Controller” task
During the real-time operation under External Mode the measurements and intermediate signals on the Box can be observed using in the PLECS Scope “Elec”. The grid phase angle, angular frequency detected by the PLL, and measured grid voltage and current are shown in Fig. 5. In the plot at the bottom, the reference current and the measured current are compared with each other. The reference amplitude of the grid current can be changed by varying the gain block “Ip” in the “Controller” task.
Conclusion
This model demonstrates a single-phase grid-connected inverter model which can run in both offline simulation and real-time operation for Hardware-in-the-loop testing and rapid control prototyping.
Bibliography
[1]
R. Teodorescu, M. Liserre and P. Rodriguez, “Grid converters for photovoltaic and wind power systems”, IEEE, Wiley, 2011
[2]
J. Allmeling and N. Felderer, “Sub-cycle average models with integrated diodes for real-time simulation of power converters,” 2017, 10.1109/SPEC.2017.8333566