Thyristor Pair

Purpose

Thyristor rectifier/inverter with a Sub-cycle average implementation

Library

Electrical / Power Modules

Description

This Power Module implements a sub-cycle averaged model of a series-connected thyristor pair with a single internal switching element and controlled current and voltage sources. One thyristor at most may conduct at a given time. The DC side of the rectifier/inverter has current source behavior. The output terminal is typically connected to an inductor.

The single-switch implementation has fewer conduction states compared to two Thyristor components. This reduces the number of switching combinations when generating code from a simulation model, as described in Code Generation for Physical Systems.

C code generated from this component is suitable for real-time simulations on the RT Box, where it is executed on the CPU or FlexArray solver.

Note

The thyristor pair cannot model a shoot-through, i.e. the situation where both thyristors conduct at the same time.

Parameters

Switch model (CPU code generation)

This parameter selects the switch model when CPU code is generated.

Fundamental grid frequency

Frequency where non-ideal switches in the open state have increased series impedance, in hertz \((\mathrm{Hz})\). The default is 0.