CLLLC Converter with NPC Half-Bridge

Purpose

Dual active bridge or resonant converter with a primary-side NPC half-bridge, optimized for Real-Time Simulations on the RT Box.

Library

Electrical / Nanostep

Description

../../_images/nanostep_clllc_npc.svg

This component implements an isolated, resonant CLLLC converter with a 3-level neutral-point clamped half bridge on the primary side. By omitting the capacitors, it can be configured as a dual active bridge (DAB) with magnetizing inductance. If only the primary side capacitor is present, the component can be used as a full-bridge LLC with synchronous rectification or an LLC with secondary leakage inductance.

Both sides of the converter have current source behavior and must each be connected directly to a capacitor or a voltage source.

The power semiconductors are modelled as ideal switches controlled by instantaneous logical gate signals. A switch is turned on when the corresponding gate signal is true.

C code generated from this component is suitable for real-time simulations on the RT Box, where it is executed on a Nanostep solver. In this case, connect the gate inputs to PWM Capture blocks from the RT Box component library.

Note

This component has a Nanostep solver weight of \(3\), indicating that it occupies one entire Nanostep solver for Real-time Simulations on the RT Box.

Note

The voltage sources connected to the converter must not be short-circuited. Therefore, combinations of switching signals that cause shoot-through of DC links are not permitted. Additionally, DC voltages across diodes must not be negative, as DC voltage clamping through diodes is not permitted.

Parameters

Certain parameters are associated with specific components. The corresponding component labels such as \(\mathrm{L}\), \(\mathrm{C}\), etc., are shown in Fig. 264.

Semiconductor symbol

Use this setting to choose between IGBT and MOSFET for the symbol of the active semiconductor switches. This setting only affects the schematic representation and does not change the electrical behavior of the component.

Primary inductance

A non-zero scalar specifying the primary-side inductance \(\mathrm{L_1}\), including the transformer leakage inductance and any external series-connected inductor, in henries \((\mathrm{H})\).

Primary winding resistance

A scalar specifying the primary-side winding resistance \(\mathrm{R_{L1}}\), in ohms \((\Omega)\).

Include primary capacitor

Allows you to include (yes) or remove (no) a resonant capacitor at the primary side.

Primary resonant capacitance

If the Include primary capacitor option is set to yes, this parameter requires a non-zero scalar for the capacitance \(\mathrm{C_1}\), in farads \((\mathrm{F})\).

Magnetizing inductance

A non-zero scalar specifying the magnetizing inductance of the transformer \(\mathrm{L_m}\), referred to the primary side, in henries \((\mathrm{H})\).

Include secondary inductance

Allows you to include (yes) or remove (no) a series leakage inductance on the secondary side.

Secondary inductance

If the Include secondary inductance option is set to yes, this parameter requires a non-zero scalar specifying the secondary-side series inductance \(\mathrm{L_2}\), including the transformer leakage inductance and any external inductors, in henries \((\mathrm{H})\).

Secondary winding resistance

If the Include secondary inductance option is set to yes, this parameter requires a scalar specifying the secondary-side winding resistance \(\mathrm{R_{L2}}\), in ohms \((\Omega)\).

Include secondary capacitor

Allows you to include (yes) or remove (no) a resonant capacitor at the secondary side.

Secondary resonant capacitance

If the Include secondary capacitor option is set to yes, this parameter requires a non-zero scalar for the capacitance \(\mathrm{C_2}\), in farads \((\mathrm{F})\).

Turns ratio

A scalar specifying the ratio of primary-side turns to secondary-side turns.

Assertions

When set to on, the block flags an error for combinations of gate signals that cause shoot-through.

Probe Signals

See Fig. 264 for the probe signal positions.

Inductor currents

A vector containing the currents through the inductors \(\mathrm{L_1}\) and \(\mathrm{L_2}\), in amperes \((\mathrm{A})\), defined positive in the direction of the arrow.

Magnetizing current

The current through the inductor \(\mathrm{L_m}\), in amperes \((\mathrm{A})\), defined positive in the direction of the arrow.

Capacitor voltages

A vector containing the voltages across the capacitors \(\mathrm{C_1}\) and \(\mathrm{C_2}\), in volts \((\mathrm{V})\), defined positive at the sides marked with (+).

Nanostep Probe Signals

Inductor currents

A vector containing the currents through the inductors \(\mathrm{L_1}\) and \(\mathrm{L_2}\), in amperes \((\mathrm{A})\), defined positive in the direction of the arrow.

Magnetizing current

The current through the inductor \(\mathrm{L_m}\), in amperes \((\mathrm{A})\), defined positive in the direction of the arrow.

Primary currents

A vector containing the currents at the primary-side converter terminals, in amperes \((\mathrm{A})\), defined positive in the direction of the arrow.

Secondary current

The current at the secondary-side converter terminals, in amperes \((\mathrm{A})\), defined positive in the direction of the arrow.

Capacitor voltages

A vector containing the voltages across the capacitors \(\mathrm{C_1}\) and \(\mathrm{C_2}\), in volts \((\mathrm{V})\), defined positive at the sides marked with (+).

Primary gate signals

A vector containing the gate signals of the primary-side semiconductor switches.

Secondary gate signals

A vector containing the gate signals of the secondary-side semiconductor switches.

../../_images/nanostep_clllc_npc_probe_signals.svg

Fig. 264 Probes for the CLLLC Converter with NPC Half-Bridge


↳ Added in PLECS 4.9.